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Chipanalog New Product Release – CA-IS3417WT

CA-IS3417WT 1700V High-voltage Isolated Switches

The CA-IS3417WT is low-EMI, opto-compatible input, reinforced isolated HV (high-voltage) switch. The input stage (primary side) is an emulated diode (e-diode). While maintaining the input characteristics of the optocoupler, it also has better consistency, long-term stability and higher reliability. Unlike traditional optical MOS relays, this device’ssignal transmission characteristics will not attenuate over time. Also, compared with traditional mechanical relays, the CA-IS3417WT features long term reliability and excellent aging characteristics.

The output stage (secondary-side) of CA-IS3417WT integrates back-to-back SiC MOSFET with up to 1700-V standoff voltage. It can operate stably at higher ambient temperatures because of SiC MOSFET’s better hightemperature characteristics and reliability.

The CA-IS3417WT devices are packaged in wide body, 12pin SOIC packages and the pinout is compatible with most of industry standard optical MOS relays. The isolation voltage between primary side and secondary-side is up to 5kVRMS @ 1 minute. This device is specified over the extended industrial temperature range of –40°C to 125°C.

Features

  • Normally Open (1-Form-A) Device
  • Opto-Compatible Input
    • No Optical Attenuation and Aging Problems of Traditional Optocouplers.
    • 5.5-V Maximum Input Reverse Voltage
  • Integrate Back-to-Back SiC MOSFET
    • Output Off-State Voltage Up to 1700V (min)
    • 1-μA (max) Output Off-State Leakage Current
    • 50-Ω (typ) Output On-State Resistance
    • Output On-State Current Up to 50mA
    • Turn-On and Turn-Off Time < 300μs
  • Wide Operating Temperature Range – –40°C to 125°C
  • High CMTI – ±150kV/µs (typ)
  • Low EMI – Passed Test According to CISPR32 Class B Standard With 2-Layer PCB Design
  • Safety-Related Certifications (Pending)
    • 5-kVRMS Isolation for 1 Minute per UL 1577
    • 7070-VPK VIOTM and 2121-VPK VIORM per DIN EN IEC 60747-17 (VDE 0884-17)
  • 12-Pin Wide Body SOIC Package
    • Creepage and Clearance ≥ 8mm (Input-Output)
    • Creepage and Clearance ≥ 5.84mm (Across Output Terminals)

Applications

  • Solid State Relay
  • Battery Management System
  • Energy Storage
  • Solar System
  • EV Charging Infrastructure