CONTACT US

CS66DT4G6Q4-9C

Ordering Code CS66DT4G6Q4-9C Category Tag

CHECKOUT SECURE

4.76

Out of stock

SRAM 512K BY 8 LOW POWER

Each price quantity has minimum unit price. Prices reflect on how many units you purchase. Unit prices are divided up into 5 different price quantities. The more quantities you purchase the lower the price unit will cost you. Choose how many you want to purchase and when you add to cart your price will be calculated. To view your bulk price please go to the checkout or cart page.

CS66DT4G6Q4-9C

Order Code CS66DT4G6Q4-9C Category Tag

Description

DDR3 4GB in  96Ball BGA

DDR3 Sync DRAM Features
Functionality
– VDD/VDDQ = 1.50±0.075V
– 1.5V center-terminated push/pull I/O
– 8n-bit prefetch DDR architecture
– Differential clock inputs (CK, CK#)
– 8 internal banks
– Nominal and dynamic on-die termination (ODT)
for data, strobe, and mask signals
– Differential data strobe per byte of data(DQS/DQS#).
– DM masks write date at the both rising and falling edge of
the data strobe
– Programmable CAS READ latency (CL)
– Posted CAS additive latency
– Programmable CAS WRITE latency (CWL) based on tCK
– Fixed burst length (BL) of 8 and burst chop (BC) of 4
(via the mode register set [MRS])
– Selectable BC4 or BL8 on–the-fly (OTF)
– Self-refresh mode
– Tc of 0°C to +95°C
· 64ms, 8192 cycle refreshes at 0°C to +85°C
· 32ms, 8192 cycle refreshes at 85°C to +95°C
– Self-refresh temperature (SRT)
– Automatic self-refresh (ASR)
– Write leveling
– Multipurpose register
– Output driver calibration
Configuration
– 64 Meg X 16 (8 Meg X 16 X 8 Banks).
– 128 Meg X 8 (16 Meg X 8 X 8 Banks)
– 256 Meg X 4 (32 Meg X 4 X 8 Banks)
Timing – Cycle time
– 938ps @ CL = 14 (-AN)
– 1.07ns @ CL = 13 (-9M)
– 1.25ns @ CL = 11 (-8K)
– 1.50ns @ CL = 9 (-6H)
– 1.87ns @ CL = 7 (-5F)
Operating Temperature Range -40 to 85 deg C